Multiplex circuit arrangement, particularly for the actuation of load stations in motor vehicles

ABSTRACT

In a multiplex circuit arrangement, particularly for actuating load stations in motor vehicles, with the circuit including a bus system, an arrangement secure against malfunctions is realized in that the end of each data line (L D ) is provided with a bidirectional bus coupling network (station network SN and distributor network VN) including two oppositely connected analog amplifiers (OP1, OP2), with at least a plurality of central bus coupling networks (distributor networks VN) being combined into a star-shaped central bus distributor arrangement (ZVA).

BACKGROUND OF THE INVENTION

The invention is directed toward a multiplex circuit arrangement,particularly for the actuation of load stations in motor vehicles. Moreparticularly, the invention relates to such a multiplex circuitarrangement wherein each station includes a hardware processor for therapid serial exchange of data and a driver circuit, with the multiplexcircuit arrangement comprising a bus system operating with an activelevel and a passive level, and with the individual stations beingconnected via a network structure, e.g. a star structure.

A circuit arrangement of this type is disclosed, for example, in DE3,730,468.A1. This circuit arrangement has a star-shaped structure, withthe actual star point, however, extending practically over the length ofthe entire vehicle. This results in a significant drawback becausedamage to the central data line may lead to the total malfunction of thesystem. The large local expanse of the star point has also beenrecognized as a problem in this publication. Another drawback of theprior art arrangement is that a large amount of circuitry is requiredfor the individual stations. Each station requires control devicesincluding microprocessors and appropriate software, data converters,data processors and bus transfer members, with the function of thesesubscriber stations ultimately being only to realize decoupling of theindividual interface units.

DE 3,149,142.A1 discloses a circuit arrangement having a relativelycomplicated central station that is equipped with two computers. Thiscircuit arrangement operates according to the master-slave principle,which is also its primary drawback. Modern arrangements do not operatewith a central electronic unit, but with equivalent interconnectedgroups (multi-master principle). Moreover, in this prior art eachsub-group is star-shaped and is approached over a separate line which isa drawback since in the automobile art it must be assumed that aplurality of sub-groups will exist, for example, for the four doors, thefour corners of the vehicle, the air-conditioning system, the seatadjustment, the sunroof, at various locations in the engine compartment,at the center console, etc. According to the prior art system, no twosuch sub-groups must be connected to the same data line if their mutualdecoupling is to be ensured. If data must be exchanged between twosub-groups, this can be effected only by way of an intermediate stop inthe central unit, for example, for the transmission of operator actuatedkeys in the region of the rear seats in order to operate a door window.

Based on this, it is the object of the invention to configure a circuitarrangement of the above-mentioned type in such a way that the loadlines are distributed in a favorable manner and can be secured by way ofa central fuse box, with the central region being locally limited if thecircuit is realized in a star structure. Moreover, it should be possibleto provide coupling to any existing data line by way of a networkwithout incurring decoupling losses. Each station should be able tocommunicate with every other station without switching processes andwithout data transfer by way of a microprocessor, with the data ofhighest priority being transmitted in each case. Finally, it should alsobe possible to add further subscriber stations to the network withoutaffecting the remaining system, with addresses being assigned to eachindividual station.

SUMMARY OF THE INVENTION

The above objects are generally accomplished according to the inventionby a multiple circuit arrangement particularly for the actuation of loadstations in motor vehicles, with each station including a hardwareprocessor for the rapid serial exchange of data and a driver circuit,wherein the multiplex circuit arrangement comprises a bus systemoperating with an active level and a passive level, with the individualstations being connected by way of a network structure, e.g. a starstructure, with each end of each data line being provided with abidirectional bus coupling network (i.e. a station network and adistributor network, respectively) comprising two oppositely connectedanalog amplifiers, and with at least a plurality of central bus couplingnetworks (i.e. the distributor networks) being combined into a centralbus distributor arrangement, preferably having a star shape.

Accordingly, the intended solution makes it possible that, if a dataline is short-circuited to ground or to the positive pole and if adriver station is malfunctioning, the entire system will not becomeunable to function since each branch of the net is decoupled. Thepassive state of the network may be the low level, with a high levelapplied at one location being transmitted to all other stations. Due tothe fact that each data line is terminated at its end, the radiationbehavior is minimized. The entire system exhibits lowpass behavior witha variable cutoff frequency and is thus able to counteract theirradiation of high frequencies.

The central bus distributor arrangement provided according to theinvention makes it possible to greatly locally limit this central regionin a star configuration and thus to considerably reduce itssusceptibility to damages and thus to malfunctions of the entire system.

According to the invention, a free-running, bidirectional distributorstation may also be constructed without requiring a central logiccontrol unit for reception or transmission, respectively, while inconventional digital bus drivers a switch must always be made betweenreceive and transmit.

Each data line can be matched at both its ends with respect to itsresistance. A desired, line specific resistance can here be set whichhas an advantageous effect on the radiation behavior. The transmittingamplifiers may be constructed to have a defined output resistance.

The above shows that a circuit arrangement according to the invention isparticularly suitable for a star structure. In principle and whilemaintaining the basic advantages, a ring- or T-shaped network can alsobe constructed.

As a further feature of the invention, respective load fuses areprovided for the respective load lines in the central distributionarrangement in the case of a star structure for the central distributorarrangement. This permits the accommodation of the meltable fuses in acentral fuse box without significant additional expenditures for lines.

The configuration of the lines to the individual loads as asymmetricaltwo-wire lines according to a further feature considers the fact thatthe data line need have only a considerably smaller cross section thanthe load line.

According to a further feature, at least one sub-distributor arrangementincluding a plurality of distributer networks is provided for thedata-load distribution. Such a sub-distributor arrangement may beprovided at a distance of up to 30 m and takes over, for example, thedata-load distribution in the rear of a motor vehicle.

According to still further features of the invention, advantageouscircuitry configurations, which will be described below together withthe description of an embodiment, are provided.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be described below in greater detail with referenceto an embodiment thereof and in connection with the drawing figureswherein:

FIG. 1 is a basic circuit diagram for a circuit arrangement according tothe invention;

FIG. 2 is a sectional view marked II in FIG. 1 of a data line with buscoupling networks disposed at both ends;

FIG. 3 is a sectional view of a cable employed in the circuitarrangement of FIG. 1; and

FIG. 4 is a detailed illustration of the circuit portion shown in FIG.2.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

A multiplex circuit arrangement according to the invention includes aplurality of load stations VS1 to VS8, each including a hardwareprocessor for the rapid serial exchange of data, with the stations beingconnected by way of lines L1 to L6 with a central bus distributorarrangement ZVA. Such a hardware microprocessor (CAN) is described, forexample, in the periodical "Elektronik-Informationen" [ElectronicInformations], No. 3, 1988, pages 46 et seq.

Bus coupling networks are provided at each end of lines L1 to L8, namelystation networks SN1 to SN8 on the sides of load stations VS1 to VS8,and distributor networks VN1 to VN9 on the side of the centraldistributor arrangement ZVA. The station networks SN and the distributornetworks VN, which are employed as bus coupling networks, have ananalogous structure. Distributor networks VN7 to VN9 are combined as asub-distributor arrangement UVA which is able to take care, for example,of the signal-load distribution in the rear of a motor vehicle.

The embodiment according to FIG. 1 has a star-shaped network structurein which the neutral point including distributor networks VN1 to VN6 canbe disposed in a small spatial region, for example, on a plate. Beforethey open into the star point, load lines L_(L) are secured with ringlines 1 and 2 by way of meltable fuses S1 to S6 that are accommodated ina central fuse box 4.

Each one of lines L1 to L8 is configured as a double wire cable, shownin FIG. 3 in a sectional view, including a load line L_(L) which has alarger cross section and a data line L_(D) which has a smaller crosssection.

Each one of the station networks SN and distributor networks VN shownindividually in FIGS. 2 and 4 includes two oppositely connected analogamplifiers OP1 and OP2, respectively. The output of analog amplifier OP1is connected to an output resistor R1 whose other side is connected byway of a resistor R6 with the (+) input of analog amplifier OP2. The (-)input of analog amplifier OP2 is grounded by way of a resistor R5 and isconnected with the output of analog amplifier OP2 by way of a resistorR4 and with the output R_(x) of load station VS by way of a furtherresistor R3.

The (-) input of analog amplifier OP1 is connected directly with theoutput. The (+) input is connected with ground by way of a resistor R2,and with the output of analog amplifier OP2 by way of a diode D1 that isconnected in the blocking, and with the input T_(x) of load station VS.

Beyond the otherwise identical configuration, except for the connectionwith the load station, it is provided for the distributor networks VNthat two series connected resistors R7 and R8 are provided at the outputend of analog amplifier OP2, between its output and diode D1, with theline to the (-) input of analog amplifier OP2 being connected betweenthese two resistors by way of resistor R4. A transistor T1 is providedand has its collector-emitter path connected at one end between resistorR8 and diode D1, and is connected at its other end to ground via a lightemitting diode D3. The base of the transistor T1 is connected with theoutput of analog amplifier 2 by way of resistor R9, on the one hand, andby way of resistor R10 and diode D2, on the other hand, and is connectedwith ground by way of a capacitor C1. The connection with the data ringline 2 of the star point is effected by way of a line 3 which isconnected between diode D1 and the (+) input of amplifier OP1 of networkVN. Data line L_(D) is connected at the free ends of resistors R1 andR6, respectively. Resistors R7 to R10 and capacitor C1 form an RC memberwhich fixes the switching point of transistor T1.

The circuit arrangement according to the invention operates as follows:

In the rest state, an E/A low signal corresponding to the passive levelis present at all inputs and outputs T_(x) and R_(x).

The loop gain of the circuit T_(x) -OP1-R1-R6-OP2-D1 network SN is lessthan 1. The transmit output T_(x) of load station VS and of the hardwareprocessor provided there includes an open drain circuit (opencollector).

Diode D1 takes care of the so-called "wired-OR structure" of thenetwork, that is, only the high level (dominant bit) is actively coupledin. The gain factor of analog amplifier OP2 counteracts excessivedamping by diode D1 so that a loop gain of slightly less than 1 can beset which is necessary.

The transmit process takes place as follows:

By way of the open drain output T_(x) a high level of 5 V is appliedwith low impedance. From the output of analog amplifier OP1 (impedanceconverter) the signal travels through matching resistor R1 to data lineL_(D) and simultaneously through analog amplifier OP2 back to receiverinput Rx. If output T_(x) sends a low signal, that is, the resistance ofT_(x) becomes high, the voltage in the network also collapses (loopgain<1).

The receive process takes place as follows:

Based on the reversal of the above-described transmit process it isassumed that a HIGH signal from data line L_(D) travels through E/A tothe load station network SN. At this moment, analog amplifier OP1 stillcarries a LOW signal, that is, the signal voltage drops across R1. Thisvoltage is returned by way of analog amplifier OP2 to the input ofanalog amplifier OP1. Its output is controlled upwards which leads to afurther rise in the signal voltage at the input of the receiver, thatis, of analog amplifier OP2. Input and output amplifiers OP2 and OP1,respectively, thus push each other up as soon as a rising signal ispresent in the data line. The rise rate of the signals is defined by the"slew rate" of analog amplifiers OP1 and OP2, respectively. If thesignal drops again, the voltage in network SN also collapses (loopsgain<1). In addition to the loop gain, the dynamic of the descendingedge also depends on the RC characteristic of the network which can beinfluenced by resistor R2.

Due to the analog structure, each distributor network VN operatescorrespondingly That is, starting from output Tx and by way of analogamplifier OP1, the signal travels to distributor network VN whichoperates as a receiver and couples the signal into line 2 in the coreregion of the star structure. All other distributor networks VN of thecentral distributor arrangement ZVA then operate as transmitters andconduct the signal to the remaining load stations VS. There therespective station networks SN again act as receivers.

To match data lines L_(D), a low-resistance impedance converter Ra ofless than 10 Ohm is provided at both sides of data line L_(D) ; togetherwith resistor R1 it takes care of precise matching.

With respect to decoupling of the bus system, a distinction must be madebetween two possible types of faults.

Short-circuits to ground are not critical with respect to the basicstructure and basic operation of the system. Diode D1 in distributornetwork VN blocks each ground signal from the associated branch line Lfrom entering the remaining bus system.

The circuit portion formed of resistors R7 to R10, capacitor C1, diodeD2, transistor T1 and diode D1 is provided in distributor networks VNwith respect to possible short circuits toward plus.

This circuit portion operates in such a way that a steady HIGH signal atthe anode of diode D1, generated by a short circuit in data line L_(D)toward plus, by a defective analog amplifier or by a destroyed hardwareprocessor (CAN) would actually put the bus system out of action. This isnow counteracted by transistor T1 with the aid of an integratorincluding resistor R9 and capacitor C1. Corresponding to the integratortime constant, transistor T1 becomes conductive and thus shorts thestatic HIGH signal to ground. Decoupled by diode D1, the remaining bussystem is able to continue working without interruption. The combinationof resistor R10 with diode D2 takes care of rapid connection of thebranch if such a fault occurs only briefly. In such a case ofmalfunction, resistors R7 and R8 protect analog amplifier OP2 againstoverloads and counteract a tendency to oscillate.

The above described circuit arrangement is preferably operated in such amanner that a start-stop mode is provided, that is, the bus system is tobe switched off in the parked state and started again as soon as anyvehicle function is actuated.

FIG. 4 shows an expanded version of the circuit arrangement described indetail above in connection with FIG. 2.

With the aid of a voltage divider formed by resistors R2, R14 and R15,the voltage level for the LOW signal is raised to 1.5 V. This voltage ismonitored by transistor T3 via resistor R17. Transistor T2 is switchedto transmit by transistor T3 and thus the network is supplied withcurrent.

If the bus system is to be turned off, all load stations VS mustsimultaneously apply a STOP signal. The potential for the LOW signal isthen pulled to ground by way of resistor R16, transistors T2 and T3block the current supply and thus disconnect the network.

An analogous process takes place in all other load stations VS so thatthe supply voltage of the central distributor arrangement ZVA islikewise shut off by way of resistors R11. The entire bus system is thuswithout voltage, that is, removal of the STOP signal has no effect.

Each load station VS is able to reawaken the entire bus system by meansof a START instruction. To do this, the own network is initiallyswitched on by way of diode D5 and resistor R13 and practicallysimultaneously a HIGH signal is put out by way of diode D4 and resistorR12. By way of resistor R11, this signal starts the current supply forthe central distributor arrangement ZVA, is then forwarded to all otherload stations VS and, by way of resistor R17, starts all stations.

I claim:
 1. A multiplex circuit arrangement, particularly for the actuation of load stations in motor vehicles, with each station including a hardware processor for the rapid serial exchange of data and a driver circuit, the multiplex circuit arrangement comprising a bus system operating with an active voltage level and a passive voltage level and with the individual load stations being connected together by a network structure of line sections each including a data line and a load line, and wherein: each end of each said data line is provided with a respective bidirectional bus coupling network, including a bus coupling station network at a respective said end of a data line connected to a station and a distributor network at the other said end of a respective said data line; each said coupling network comprises a first analog amplifier and a second analog amplifier which is oppositely connected with said first analog amplifier; and at least a plurality of central ones of said bus coupling distributor networks are combined into a central bus distributor arrangement.
 2. A multiplex circuit arrangement according to claim 1, wherein the line sections to the individual load stations are configured as asymmetrical, two-wire lines.
 3. A multiplex circuit arrangement according to claim 1, wherein at least one sub-distributor arrangement, including a further plurality of said bus coupling distributor networks connected in a star-configuration, is connected between one of said at least a plurality of central ones of said bus coupling distributor networks and the bus coupling station network of each of a plurality of stations to provide for the data-load distribution.
 4. A multiplex circuit arrangement according to claim 1, wherein each said first analog amplifier, which acts as impedance converter, has an input which is connected to a signal input of the respective said coupling network and an output which is connected via a matching resistor to the associated respective said data line.
 5. A multiplex circuit arrangement according to claim 1, wherein, as a protective measure against short circuits to ground, an output of the said second analog amplifier of a respective said coupling network is connected via a first diode to a signal input of said first analog amplifier of said respective said coupling network.
 6. A multiplex circuit arrangement according to claim 5, wherein each said bus coupling distributor network is provided with a protective circuit against short circuits to a positive level including a transistor having a controlled current path connected in series with a second diode between said output of the respective said second analog amplifier and ground, and an RC integrator circuit having an input connected to the output of said respective said second analog amplifier and an output connected to a control input of said transistor, whereby the transistor short circuits a static HIGH voltage level signal to ground as a function of the time constant of the integrator.
 7. A multiplex circuit arrangement according to claim 6, further comprising a series connection of a resistor and a third diode connected in parallel with the resistor of said RC integrator circuit.
 8. A multiplex circuit arrangement according to claim 1 wherein said plurality of central ones of said bus coupling distributor networks are combined into a star-shaped central bus distributor arrangement.
 9. A multiplex circuit arrangement according to claim 8, wherein each said first analog amplifier, which acts as impedance converter, has an input which is connected to a signal input of the respective said coupling network and an output which is connected via a matching resistor to the respective said data line.
 10. A multiplex circuit arrangement according to claim 9, wherein, as a protective measure against short circuits to ground, an output of the respective said second analog amplifier is connected via a first diode to said signal line of the respective said coupling network.
 11. A multiplex circuit arrangement according to claim 10, wherein each said distributor network is provided with a further protective circuit against short circuits to a positive level including a transistor having a controlled current path connected in series with a second diode between said output of the respective said second analog amplifier and ground, and an RC integrator circuit having an input connected to the output of said respective said second analog amplifier and an output connected to a control input of said transistor, whereby the transistor short circuits a static HIGH voltage level signal to ground as a function of the time constant of the integrator circuit.
 12. A multiplex circuit arrangement according to claim 8, wherein load fuses for the load lines of the respective line sections connected at said central bus distributor arrangement are provided in said central distributor arrangement. 